LibreSilicon - User contributions [en]

Test Die SG13G2@1.2V

2026-10-27T05:25:38Z

Leviathan:

https://gitlab.libresilicon.com/designs/highwaytestchip/-/tree/sg13g2_1v2?ref_type=heads

<syntaxhighlight lang="bash">
git clone https://gitlab.libresilicon.com/designs/highwaytestchip.git
cd highwaytestchip

</syntaxhighlight><syntaxhighlight lang="bash">
apt update
apt install g++ git yosys ngspice python3-pip
python3.12 -m venv venv
. venv/bin/activate
pip install git+https://gitlab.libresilicon.com/leviathan/highway
</syntaxhighlight><syntaxhighlight lang="bash">
rm -rf build flow highway.toml highway.yaml macros pads.json

highway init --node SG13G2 --voltage "1.2 V"

highway add src/ring8/ring8.v src/led_logic/led_logic.v src/clk_buf/clk_buf.v src/test_chip.v

highway core add ring8 --top ring8 --top-file src/ring8/ring8.v --sources src/ring8/ring8.v --instances ring8

highway core add led_logic --top led_logic --top-file src/led_logic/led_logic.v --sources src/led_logic/led_logic.v --instances led_logic

highway set top test_chip

highway pads init

highway lib

highway run
</syntaxhighlight>

2026-10-26T00:18:11Z

Leviathan:

Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using [[LibrePDK]] and [https://coriolis.lip6.fr Coriolis].

Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">
apt update
apt install g++ git
python3.12 -m venv venv
. venv/bin/activate
pip install git+https://gitlab.libresilicon.com/leviathan/highway
</syntaxhighlight>

== Test dies ==
Below a list of links to test die tapeouts for validating the [[Pad Frame Generator]] and [[StdCellLib CellLibraries]] generator with manufacturing nodes and technologies.

* [[Test Die SG13G2@1.2V]]

Highway

2026-10-26T00:12:08Z

Leviathan:

Highway

2026-10-26T00:00:51Z

Leviathan:

Highway

2026-10-25T23:58:59Z

Leviathan: Created page with "Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using LibrePDK and Coriolis. Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash"> python3.12 -m venv venv . venv/bin/activate pip install git+https://gitlab.libresilicon.com/leviathan/highway </syntaxhighlight>"

Main Page

2026-10-25T23:55:38Z

Leviathan:

This is the knowledge DB for the [[LibreSilicon stack]]

Please check out the [[LibreSilicon stack]] here for an overview!!

The official website can be found here under [https://libresilicon.com/ LibreSilicon]

The LibreSilicon knowledge DB is holding [[chemical recipes]] as well as [[software tools]] needed to build free and open source semiconductors.

As well as the [[Danube River]] test wafer, and it's precursor the [[Pearl River]]

The process is flexible and can be implemented with various machines from various vendors.

There's no need to have a very specific machine from a very specific vendor, as long as you're covering the [[Basic Tooling]] you should be ready to go.

The [[LibrePDK]] contains tools for generating everything you need in order to generate fully functional chip design based on the design rules you provide and ship the GDS2 file to the factory for manufacturing:

* The Standard Logic Cell generator (https://pdk.libresilicon.com/)
* The Pad Frame Generator which assembles the [[Pad Cell]] generated based on the design rules and timings provided, using the [[Pad Cell Generator]]
'''The main VLSI project manager is [[Highway]]'''

LibrePDK

2026-10-25T23:46:50Z

Leviathan:

TL;DR: pip install LibrePDK (https://pypi.org/project/LibrePDK/0.1.1/)

The LibrePDK is the library driving [[Danube River]] and the [[Pad Cell Generator]]
[[File:LibrePDK.png|none|thumb|695x695px|ALibrePDK screen shot]]
It is responsible for generating discrete parts with specific parameters for a specific process.

The properties of the parts can be optimized by utilizing the calibration values extracted from the measurements of taped out Danube River test wafers.

== Adding a new technology ==
Technologies currently supported can be found in the technologies subfolder.

https://gitlab.libresilicon.com/generator-tools/librepdk/-/tree/master/LibrePDK/technologies?ref_type=heads

New technologies can be added by modifying '''scripts/update_technologies.sh''' and adding a tech.python script to the technologies folder.

After that, LibrePDK should be capable of auto discovering the new process after running the update script.

== Dependencies ==

=== Ubuntu ===
We are using Ubuntu 25.04 in our Docker containers

Simply run<syntaxhighlight lang="bash">apt-get update && apt-get install -y --no-install-recommends \
autoconf automake bash bison build-essential ca-certificates cargo checkinstall clang cmake \
curl flex g++ gcc git git-lfs glpk-utils gosu imagemagick libblas-dev libcairo2-dev \
libcurl4-gnutls-dev libeigen3-dev libfl-dev libgit2-dev libgit2-glib-1.0-dev libglpk-dev \
libglu1-mesa-dev liblemon-dev libreadline-dev libsparsehash-dev libsqlite3-dev libtool \
libxaw7-dev libz-dev llvm make mmv pdf2svg pkg-config python3-dev python3-full python3-pip \
rsync ruby ruby-dev rustc software-properties-common sqlite3 sudo tcl tcl8.6-dev tcllib \
texlive-latex-recommended time tk8.6-dev tklib unzip vim wget z3 zlib1g-dev
</syntaxhighlight>

=== Boost ===
In order for [[LibrePDK#Limbo|Limbo]] to successfully compile we need to install Boost.

We are currently using boost 1.91.0, of which the tar ball can be obtained here https://archives.boost.io/release/1.91.0/source/boost_1_91_0.tar.gz

With the following command Boost can be installed quickly<syntaxhighlight lang="bash">
./bootstrap.sh \
--prefix=/usr \
--with-python-version=3.13

./b2 install
</syntaxhighlight>Note that the Python version we compile boost for is 3.13, because LibrePDK hasn't been tested with any later version.

=== ngspice ===
For the simulation and characterization of standard cells you will need the ngspice frontend and backend library

Currently we are using version 44.2 of ngspice, the tar ball can be obtained from here: https://download.industrysoftware.automation.siemens.com/open-source/ngspice-44.2.tar.gz

==== Backend configuration ====
The backend library is needed for Charlib in order to run characterization of our cells<syntaxhighlight lang="bash">
./autogen.sh
./configure --with-ngshared --enable-xspice --enable-cider --enable-openmp --disable-debug
make -j$(nproc)
make install

</syntaxhighlight>After compilation and installation you should have a libngspice.so in your ldpath which charlib can pick up on and load it.

==== Frontend configuration ====
This will compile and install the ngspice CLI binary which is needed when you wanna simulate your circuits.<syntaxhighlight lang="bash">
./autogen.sh
../configure --with-x --with-readline=yes --enable-xspice
make -j$(nproc)
make install

</syntaxhighlight>ngspice is also used when loading and importing new technologies into LibrePDK

=== OpenVAF models ===
IHP's SG13G2 technology node uses OpenVAF models for the ngspice simulation tool.

The following script will make sure that rust and the OpenVAF tool are present and then
compiles the models into the osdi format and places them into the technology directory
ready to be used by LibrePDK.

Simply run the following script and confirm the installation by checking for the LibrePDK/technologies/spice/SG13G2/devices/*/*.osdi files.

This requires the LibrePDK repo to already have [[LibrePDK#Installation|been cloned and updated]] as shown in.

./scripts/update_ngspice_extensions.sh

=== LP solver ===

Google now officially runs the project and you can get the most recent version from GitHub

Install is by cloning and building it<syntaxhighlight lang="bash">
git clone https://github.com/lp-solve/lp_solve
pushd lp_solve/lpsolve55
rm -rf bin/ux64
sh ccc
popd
</syntaxhighlight> Then you can copy the shared object file in solve/lpsolve55/bin/ux64 into your /usr/lib64 and copy the headers with<syntaxhighlight lang="bash">
mkdir /usr/include/lpsolve
cp lp_solve/*.h /usr/include/lpsolve/
</syntaxhighlight>OR, you can install the system package and devel package with your package manager

=== Lemon ===

That library has been developed by a Hungarian university which doesn't maintain their Mercurial setup. Best approach is to use the version you find in your distribution
=== Limbo ===

The official version of Limbo has been a total mess when it comes to building libs and linking them. I had to make some severe modifications which makes CMake properly build shared object files and detects the system wide installation of the dependencies
using proper CMake detection functions

Just run<syntaxhighlight lang="bash">
git clone https://gitlab.libresilicon.com/leviathan/limbo.git
mkdir Limbo/build
pushd Limbo/build
cmake ..
make
make install
popd
</syntaxhighlight>

== Installation with pip install ==
With Python 12 available you can simply install the pre-build wheel using pip (https://pypi.org/project/LibrePDK/0.1.1/)<syntaxhighlight lang="bash">
pip install LibrePDK
</syntaxhighlight>

== Installation ==
Before you start installing LibrePDK, you first need to [[LibrePDK#Dependencies|install its dependencies]] so that its C++ extensions and other C++ tools compile successfully.

After that, please clone the repo.

pip install [https://gitlab.libresilicon.com/generator-tools/librepdk.git https+git://gitlab.libresilicon.com/generator-tools/librepdk.git]

Don't forget to make sure that all the submodules and their submodules are cloned

git submodule update --init --recursive

For placement of discrete componentes used in more complex components like Driver Circuits, OpAmps, etc. IdeaPlaceExPy is being used.

IdeaPlaceExPy requires the Python system headers to be installed and the virtual env has to match the Python version with which it was compiled.

=== Using LibrePDK in a Virtual Environment (FINAL SETUP) ===
It is recommended to use LibrePDK in a Python virtual environment to avoid dependency conflicts with
system-wide Python packages.

After you've installed all the below dependencies the recommended way of installing the remaining dependencies is to run<syntaxhighlight lang="bash">
uv sync --no-cache
</syntaxhighlight>

== Building your own Docker images ==
Inside of the LibrePDK source folder you will find a script where you can uncomment and comment specific build stages of the multistage Docker build covering all the dependencies

Check out the script '''[https://gitlab.libresilicon.com/generator-tools/librepdk/-/blob/master/scripts/build_docker_images.sh?ref_type=heads scripts/build_docker_images.sh]'''

= Components =
LibrePDK provides generators for the basic components usually found within a VLSI/ULSI design, such as resistors, capacitors, diodes and transistors.

== Capacitors ==
LibrePDK can calculate the specific geometry based on the device rules and available parameters for generating any desired target capacitance value. Below a 50pF capacitor can be seen. You will notice the enormous dimensions of the structure.
[[File:50pF MiMCap (GF180A, 3.3V).png|none|thumb|300x300px]]
Usually we deal with femto Farad in VLSI design so you should never be in a situation where you have large capacitors on your chip.

LibrePDK still can generate you a device, you just won't be happy about it.

== Resistors ==
There's two types of resistor structures available: Meander and strip resistors

LibrePDK automatically adds a guard ring around any resistor which should be on a well

'''The meander here is 200 Ohms for GF180A@3.3V'''[[File:LibrePDK Meander Example.png|none|thumb|300x300px]]'''The meander here is 500 Ohms for GF180A@3.3V'''[[File:Strip Resistor Example.png|none|thumb|300x300px]]

== Diodes ==
[[File:Diode Example.png|none|thumb|300x300px|Example of a diode]]
While normal fingered diodes now have been implemented Schottky diodes still are work in progress.

== Schottky diodes ==
Those are not yet implemented

== Transistors ==
In order to make sure that our transistors don't go up in flame, we have to take the hot carrier migration and thermal budget into consideration when we decide what transistor to use and whether it should have only one gate or should be fingered.

LibrePDK takes care of this and chooses the right transistor with the right amount of fingers for you based on the target operating voltage and current you plan to pump through it, you provide.

Additionally, you can also overwrite the thermal budget which usually is assumed to be for an internal circuit which isn't bonded directly to the outside.

When LibrePDK calculates that electron migration and thermal budget constraints don't allow for a single gate transistor it will dynamically create a fingered structure, either with bulk and source connected or not with the proper guard ring.
[[File:Fingered Transistor.png|none|thumb|300x300px|Example of a fingered transistor]]
Libre PDK may also decide to just generate a single gate transistor in cases where there's very little power involved
[[File:Single Gate Example.png|none|thumb|300x300px|Example of a single gate transistor]]

== Pad Cells ==
Last but not least: It contains the [[Pad Cell Generator]] which produces beauties like this
[[File:30mA SG13G2@3V3 v2.png|none|thumb|356x356px]]

Leviathan: /* How to use */

Pad Frame Generator

2026-08-31T13:38:54Z

Leviathan: /* How to use */

Pad Frame Generator

2026-08-31T13:38:26Z

Leviathan: /* Types of Pad Cells produced */

Pad Frame Generator

2026-08-31T13:38:14Z

Leviathan: /* How to use */

Pad Frame Generator

2026-08-31T13:37:38Z

Leviathan: /* How to use */