LibreSilicon - Recent changes [en]

Test Die SG13G2@1.2V

Leviathan — Tue, 27 Oct 2026 05:25:38 GMT

← Older revision		Revision as of 05:25, 27 October 2026
Line 28:		Line 28:
	highway lib		highway lib

			highway run
	</syntaxhighlight>		</syntaxhighlight>

User:ManuelTran66592

ManuelTran66592 — Mon, 26 Oct 2026 22:18:32 GMT

User account ManuelTran66592 was created

Test Die SG13G2@1.2V

Leviathan — Mon, 26 Oct 2026 16:47:17 GMT

← Older revision		Revision as of 16:47, 26 October 2026
(One intermediate revision by the same user not shown)
Line 12:		Line 12:
	pip install git+https://gitlab.libresilicon.com/leviathan/highway		pip install git+https://gitlab.libresilicon.com/leviathan/highway
	</syntaxhighlight><syntaxhighlight lang="bash">		</syntaxhighlight><syntaxhighlight lang="bash">
			rm -rf build flow highway.toml highway.yaml macros pads.json

	highway init --node SG13G2 --voltage "1.2 V"		highway init --node SG13G2 --voltage "1.2 V"

Line 19:		Line 21:

	highway core add led_logic --top led_logic --top-file src/led_logic/led_logic.v --sources src/led_logic/led_logic.v --instances led_logic		highway core add led_logic --top led_logic --top-file src/led_logic/led_logic.v --sources src/led_logic/led_logic.v --instances led_logic

	~~highway core add clk_buf --top clk_buf --top-file src/clk_buf/clk_buf.v --sources src/clk_buf/clk_buf.v --instances clk_buf~~

	highway set top test_chip		highway set top test_chip

Highway

Leviathan — Mon, 26 Oct 2026 05:17:47 GMT

← Older revision		Revision as of 05:17, 26 October 2026
Line 3:		Line 3:
	Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">		Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">
	apt update		apt update
	apt install g++ git yosys ngspice		apt install g++ git yosys ngspice python3-pip
	python3.12 -m venv venv		python3.12 -m venv venv
	. venv/bin/activate		. venv/bin/activate

Test Die SG13G2@1.2V

Leviathan — Mon, 26 Oct 2026 05:17:34 GMT

← Older revision		Revision as of 05:17, 26 October 2026
(One intermediate revision by the same user not shown)
Line 7:		Line 7:
	</syntaxhighlight><syntaxhighlight lang="bash">		</syntaxhighlight><syntaxhighlight lang="bash">
	apt update		apt update
	apt install g++ git yosys ngspice		apt install g++ git yosys ngspice python3-pip
	python3.12 -m venv venv		python3.12 -m venv venv
	. venv/bin/activate		. venv/bin/activate
Line 25:		Line 25:

	highway pads init		highway pads init

			highway lib

	</syntaxhighlight>		</syntaxhighlight>

Highway

Leviathan — Mon, 26 Oct 2026 01:48:01 GMT

← Older revision		Revision as of 01:48, 26 October 2026
Line 3:		Line 3:
	Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">		Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">
	apt update		apt update
	apt install g++ git		apt install g++ git yosys ngspice
	python3.12 -m venv venv		python3.12 -m venv venv
	. venv/bin/activate		. venv/bin/activate

Test Die SG13G2@1.2V

Leviathan — Mon, 26 Oct 2026 00:56:02 GMT

← Older revision		Revision as of 00:56, 26 October 2026
(2 intermediate revisions by the same user not shown)
Line 1:		Line 1:
	https://gitlab.libresilicon.com/designs/highwaytestchip/-/tree/sg13g2_1v2?ref_type=heads		https://gitlab.libresilicon.com/designs/highwaytestchip/-/tree/sg13g2_1v2?ref_type=heads

			<syntaxhighlight lang="bash">
			git clone https://gitlab.libresilicon.com/designs/highwaytestchip.git
			cd highwaytestchip

			</syntaxhighlight><syntaxhighlight lang="bash">
			apt update
			apt install g++ git yosys ngspice
			python3.12 -m venv venv
			. venv/bin/activate
			pip install git+https://gitlab.libresilicon.com/leviathan/highway
			</syntaxhighlight><syntaxhighlight lang="bash">
			highway init --node SG13G2 --voltage "1.2 V"

			highway add src/ring8/ring8.v src/led_logic/led_logic.v src/clk_buf/clk_buf.v src/test_chip.v

			highway core add ring8 --top ring8 --top-file src/ring8/ring8.v --sources src/ring8/ring8.v --instances ring8

			highway core add led_logic --top led_logic --top-file src/led_logic/led_logic.v --sources src/led_logic/led_logic.v --instances led_logic

			highway core add clk_buf --top clk_buf --top-file src/clk_buf/clk_buf.v --sources src/clk_buf/clk_buf.v --instances clk_buf

			highway set top test_chip

			highway pads init

			</syntaxhighlight>

Test Die SG13G2@1.2V

Leviathan — Mon, 26 Oct 2026 00:19:02 GMT

Created page with "https://gitlab.libresilicon.com/designs/highwaytestchip/-/tree/sg13g2_1v2?ref_type=heads"

New page

https://gitlab.libresilicon.com/designs/highwaytestchip/-/tree/sg13g2_1v2?ref_type=heads

Highway

Leviathan — Mon, 26 Oct 2026 00:18:11 GMT

← Older revision		Revision as of 00:18, 26 October 2026
(2 intermediate revisions by the same user not shown)
Line 1:		Line 1:
	Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using LibrePDK and Coriolis.		Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using [[LibrePDK]] and [https://coriolis.lip6.fr Coriolis].

	Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">		Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">
			apt update
			apt install g++ git
	python3.12 -m venv venv		python3.12 -m venv venv
	. venv/bin/activate		. venv/bin/activate
	pip install git+https://gitlab.libresilicon.com/leviathan/highway		pip install git+https://gitlab.libresilicon.com/leviathan/highway
	</syntaxhighlight>		</syntaxhighlight>

			== Test dies ==
			Below a list of links to test die tapeouts for validating the [[Pad Frame Generator]] and [[StdCellLib CellLibraries]] generator with manufacturing nodes and technologies.

			* [[Test Die SG13G2@1.2V]]

Highway

Leviathan — Sun, 25 Oct 2026 23:58:59 GMT

Created page with "Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using LibrePDK and Coriolis. Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash"> python3.12 -m venv venv . venv/bin/activate pip install git+https://gitlab.libresilicon.com/leviathan/highway </syntaxhighlight>"

New page

Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using LibrePDK and Coriolis.

Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash">
python3.12 -m venv venv
. venv/bin/activate
pip install git+https://gitlab.libresilicon.com/leviathan/highway
</syntaxhighlight>

Main Page

Leviathan — Sun, 25 Oct 2026 23:55:38 GMT

← Older revision		Revision as of 23:55, 25 October 2026
Line 17:		Line 17:
	* The Standard Logic Cell generator (https://pdk.libresilicon.com/)		* The Standard Logic Cell generator (https://pdk.libresilicon.com/)
	* The Pad Frame Generator which assembles the [[Pad Cell]] generated based on the design rules and timings provided, using the [[Pad Cell Generator]]		* The Pad Frame Generator which assembles the [[Pad Cell]] generated based on the design rules and timings provided, using the [[Pad Cell Generator]]
			'''The main VLSI project manager is [[Highway]]'''

LibrePDK

Leviathan — Sun, 25 Oct 2026 23:46:50 GMT

← Older revision		Revision as of 23:46, 25 October 2026
Line 1:		Line 1:
			TL;DR: pip install LibrePDK (https://pypi.org/project/LibrePDK/0.1.1/)


	The LibrePDK is the library driving [[Danube River]] and the [[Pad Cell Generator]]		The LibrePDK is the library driving [[Danube River]] and the [[Pad Cell Generator]]
	[[File:LibrePDK.png\|none\|thumb\|695x695px\|ALibrePDK screen shot]]		[[File:LibrePDK.png\|none\|thumb\|695x695px\|ALibrePDK screen shot]]
Line 110:		Line 113:
	popd		popd
	</syntaxhighlight>		</syntaxhighlight>

			== Installation with pip install ==
			With Python 12 available you can simply install the pre-build wheel using pip (https://pypi.org/project/LibrePDK/0.1.1/)<syntaxhighlight lang="bash">
			pip install LibrePDK
			</syntaxhighlight>

	== Installation ==		== Installation ==
	Before you start installing LibrePDK, you first need to [[LibrePDK#Dependencies\|install its dependencies]] so that its C++ extensions and other C++ tools compile successfully.		Before you start installing LibrePDK, you first need to [[LibrePDK#Dependencies\|install its dependencies]] so that its C++ extensions and other C++ tools compile successfully.

Main Page

Leviathan — Sun, 25 Oct 2026 23:44:00 GMT

← Older revision		Revision as of 23:44, 25 October 2026
Line 13:		Line 13:
	There's no need to have a very specific machine from a very specific vendor, as long as you're covering the [[Basic Tooling]] you should be ready to go.		There's no need to have a very specific machine from a very specific vendor, as long as you're covering the [[Basic Tooling]] you should be ready to go.

	The LibrePDK contains tools for generating everything you need in order to generate fully functional chip design based on the design rules you provide and ship the GDS2 file to the factory for manufacturing:		The [[LibrePDK]] contains tools for generating everything you need in order to generate fully functional chip design based on the design rules you provide and ship the GDS2 file to the factory for manufacturing:

	* The Standard Logic Cell generator (https://pdk.libresilicon.com/)		* The Standard Logic Cell generator (https://pdk.libresilicon.com/)
	* The Pad Frame Generator which assembles the [[Pad Cell]] generated based on the design rules and timings provided, using the [[Pad Cell Generator]]		* The Pad Frame Generator which assembles the [[Pad Cell]] generated based on the design rules and timings provided, using the [[Pad Cell Generator]]

Software tools

Leviathan — Sun, 25 Oct 2026 23:43:33 GMT

LibrePDK

← Older revision		Revision as of 23:43, 25 October 2026
Line 5:		Line 5:

	LibrePDK is licensed under the GNU Affero General Public License and aims to replace StdCellLib in its functionality due to the developer not having the same Free Software Foundation definition of Free Software as I do and has re-licensed his tool under frigging Apache license.		LibrePDK is licensed under the GNU Affero General Public License and aims to replace StdCellLib in its functionality due to the developer not having the same Free Software Foundation definition of Free Software as I do and has re-licensed his tool under frigging Apache license.

			It can be installed with pip install, the wheel is published: https://pypi.org/project/LibrePDK/0.1.1/

	==Standard Cell Library Generator==		==Standard Cell Library Generator==

User:ConradTrimble0

ConradTrimble0 — Sun, 25 Oct 2026 06:05:17 GMT

User account ConradTrimble0 was created

User:DarrellTripp5

DarrellTripp5 — Fri, 23 Oct 2026 21:07:59 GMT

User account DarrellTripp5 was created

User:GlendaIum99426

GlendaIum99426 — Fri, 23 Oct 2026 18:45:17 GMT

User account GlendaIum99426 was created

User:TillyX650679724

TillyX650679724 — Mon, 19 Oct 2026 01:46:55 GMT

User account TillyX650679724 was created

User:Martinkucera34

Martinkucera34 — Sun, 18 Oct 2026 03:17:42 GMT

User account Martinkucera34 was created

User:Lukassvobod9de4

Lukassvobod9de4 — Sat, 17 Oct 2026 22:19:56 GMT

User account Lukassvobod9de4 was created

User:RonaldHld50

RonaldHld50 — Sat, 17 Oct 2026 13:35:59 GMT

User account RonaldHld50 was created

User:HoustonErwin0

HoustonErwin0 — Mon, 05 Oct 2026 20:34:46 GMT

User account HoustonErwin0 was created

User:TrentWortman

TrentWortman — Sun, 04 Oct 2026 04:00:37 GMT

User account TrentWortman was created

User:FerminUwc99

FerminUwc99 — Sat, 03 Oct 2026 21:35:30 GMT

User account FerminUwc99 was created

User:Reina7415680

Reina7415680 — Sat, 03 Oct 2026 00:44:42 GMT

User account Reina7415680 was created

User:ReinaldoMurch

ReinaldoMurch — Fri, 02 Oct 2026 23:27:02 GMT

User account ReinaldoMurch was created

User:RussellGrubbs

RussellGrubbs — Fri, 02 Oct 2026 19:59:35 GMT

User account RussellGrubbs was created

User:EfrenHickey2910

EfrenHickey2910 — Thu, 01 Oct 2026 09:52:08 GMT

User account EfrenHickey2910 was created

User:GinoAnivitti0

GinoAnivitti0 — Wed, 30 Sep 2026 20:12:28 GMT

User account GinoAnivitti0 was created

User:RussBivins2775

RussBivins2775 — Wed, 30 Sep 2026 09:11:16 GMT

User account RussBivins2775 was created

User:RhysKessell

RhysKessell — Tue, 29 Sep 2026 23:13:45 GMT

User account RhysKessell was created