Pad Cell - Revision history

Leviathan: /* Transmission gate */

2025-10-12T16:00:40Z

Transmission gate

← Older revision		Revision as of 16:00, 12 October 2025
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	\|}		\|}

	== ~~Transmission gate~~ ==		== Input Buffer/Level Shifter ==
	The transmission gate has the purpose of making sure that the input signal is being shifted to the logic levels of the internal logic, for instance 3V3 external logic levels to 1V8 internal logic.		The transmission gate has the purpose of making sure that the input signal is being shifted to the logic levels of the internal logic, for instance 3V3 external logic levels to 1V8 internal logic.
	[[File:Transmission gate.png\|none\|thumb\|Transmission Gate Schematics]]		[[File:Transmission gate.png\|none\|thumb\|Transmission Gate Schematics]]
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	This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.		This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.

	In the schematic above, the output transistors M7 and M8 are responsible for ultimately driving the loads attached to a pad and as such will be much larger than their driving transistors (M1=M6)		In the schematic above, the output transistors M7 and M8 are responsible for ultimately driving the loads attached to a pad and as such will be much larger than their driving transistors (M1=M6). M7/M8 are [[Fingered Transistors]]

	== ESD protection ==		== ESD protection ==

2025-09-21T19:13:27Z

Transmission gate

← Older revision		Revision as of 19:13, 21 September 2025
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	== Transmission gate ==		== Transmission gate ==
	The transmission gate has the purpose of making sure that the input signal is being shifted to the logic levels of the internal logic, for instance 3V3 external logic levels to 1V8 internal logic.		The transmission gate has the purpose of making sure that the input signal is being shifted to the logic levels of the internal logic, for instance 3V3 external logic levels to 1V8 internal logic.
			[[File:Transmission gate.png\|none\|thumb\|Transmission Gate Schematics]]
	In addition, it contains additional polarity, over voltage and current protection.		In addition, it contains additional polarity, over voltage and current protection.

2025-09-20T20:22:22Z

Driver circuit

← Older revision		Revision as of 20:22, 20 September 2025
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	[[File:Output Driver.png\|none\|thumb\|Driver Circuit Schematic]]		[[File:Output Driver.png\|none\|thumb\|Driver Circuit Schematic]]
	This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.		This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.

			In the schematic above, the output transistors M7 and M8 are responsible for ultimately driving the loads attached to a pad and as such will be much larger than their driving transistors (M1=M6)

	== ESD protection ==		== ESD protection ==

2025-09-20T20:20:14Z

Driver circuit

← Older revision		Revision as of 20:20, 20 September 2025
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	In order to make a chip do something useful driver circuits need to be implemented which can provide the power needed for actually driving loads like making an LED blink or driving a small DC motor.		In order to make a chip do something useful driver circuits need to be implemented which can provide the power needed for actually driving loads like making an LED blink or driving a small DC motor.
			[[File:Output Driver.png\|none\|thumb\|Driver Circuit Schematic]]
	This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.		This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.

2025-09-20T20:18:11Z

Transmission gate

← Older revision		Revision as of 20:18, 20 September 2025
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	== Transmission gate ==		== Transmission gate ==
			The transmission gate has the purpose of making sure that the input signal is being shifted to the logic levels of the internal logic, for instance 3V3 external logic levels to 1V8 internal logic.

			In addition, it contains additional polarity, over voltage and current protection.

	== Driver circuit ==		== Driver circuit ==

2025-09-20T19:54:25Z

2025-09-20T19:53:22Z

INV (Inverter)

← Older revision		Revision as of 19:53, 20 September 2025
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	{\| class="wikitable" style="text-align:center"		{\| class="wikitable" style="text-align:center"
	\|-		\|-
	! colspan="2" \| Inverter [[truth table]]		! colspan="2" \| Inverter truth table
	\|- bgcolor="#ddeeff"		\|- bgcolor="#ddeeff"
	\|colspan=1\|'''Input''' \|\| '''Output'''		\|colspan=1\|'''Input''' \|\| '''Output'''

2025-09-20T19:53:06Z

INV (Inverter)

← Older revision		Revision as of 19:53, 20 September 2025
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	[[File:Inverter.png\|none\|thumb\|An Inverter gate]]		[[File:Inverter.png\|none\|thumb\|An Inverter gate]]

	{\| class="wikitable ~~floatright~~" style="text-align:center"		{\| class="wikitable" style="text-align:center"
	\|-		\|-
	! colspan="2" \| Inverter [[truth table]]		! colspan="2" \| Inverter [[truth table]]
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	\| A \|\| NOT A		\| A \|\| NOT A
	\|-		\|-
	~~\|{{no2~~\|0}}		! style="color:red"\| 0
	~~\|{{yes2~~\|1}}		! style="color:green" \| 1
	\|-		\|-
	~~\|{{yes2~~\|1}}		! style="color:green" \| 1
	~~\|{{no2~~\|0}}		! style="color:red"\| 0
	\|}		\|}

2025-09-20T19:52:20Z

INV (Inverter)

← Older revision		Revision as of 19:52, 20 September 2025
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	[[File:Inverter.png\|none\|thumb\|An Inverter gate]]		[[File:Inverter.png\|none\|thumb\|An Inverter gate]]

			{\| class="wikitable floatright" style="text-align:center"
			\|-
			! colspan="2" \| Inverter [[truth table]]
			\|- bgcolor="#ddeeff"
			\|colspan=1\|'''Input''' \|\| '''Output'''
			\|- bgcolor="#ddeeff"
			\| A \|\| NOT A
			\|-
			\|{{no2\|0}}
			\|{{yes2\|1}}
			\|-
			\|{{yes2\|1}}
			\|{{no2\|0}}
			\|}

	=== NAND2 (NAND gate) ===		=== NAND2 (NAND gate) ===

2025-09-20T19:51:56Z

INV (Inverter)

← Older revision		Revision as of 19:51, 20 September 2025
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	=== INV (Inverter) ===		=== INV (Inverter) ===
			[[File:Inverter.png\|none\|thumb\|An Inverter gate]]


	=== NAND2 (NAND gate) ===		=== NAND2 (NAND gate) ===

← Older revision		Revision as of 19:53, 20 September 2025
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	[[File:Inverter.png\|none\|thumb\|An Inverter gate]]		[[File:Inverter.png\|none\|thumb\|An Inverter gate]]

	{\| class="wikitable ~~floatright~~" style="text-align:center"		{\| class="wikitable" style="text-align:center"
	\|-		\|-
	! colspan="2" \| Inverter [[truth table]]		! colspan="2" \| Inverter [[truth table]]
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	\| A \|\| NOT A		\| A \|\| NOT A
	\|-		\|-
	~~\|{{no2~~\|0}}		! style="color:red"\| 0
	~~\|{{yes2~~\|1}}		! style="color:green" \| 1
	\|-		\|-
	~~\|{{yes2~~\|1}}		! style="color:green" \| 1
	~~\|{{no2~~\|0}}		! style="color:red"\| 0
	\|}		\|}