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26 October 2026

25 October 2026

  • curprev 23:5823:58, 25 October 2026 Leviathan talk contribs 445 bytes +445 Created page with "Highway is the LibreSilicon VLSI project manager which helps you easily manage multiple Verilog and HDL projects, add them to a die, configure a padframe and run a complete synthesis flow using LibrePDK and Coriolis. Simply create a Python 3.12 environment and install the tool with pip<syntaxhighlight lang="bash"> python3.12 -m venv venv . venv/bin/activate pip install git+https://gitlab.libresilicon.com/leviathan/highway </syntaxhighlight>" Tag: Visual edit
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