Pad Cell Generator: Difference between revisions
No edit summary |
|||
Line 11: | Line 11: | ||
Various additional functions can be implemented, like for instance impedance and termination resistor calibration in case it's part of a DRAM or PCIe PHY. | Various additional functions can be implemented, like for instance impedance and termination resistor calibration in case it's part of a DRAM or PCIe PHY. | ||
In short, the driver logic configures the actual physical properties of the pad depending on what the internal logic tells it to do: | |||
* Set transistors to either drive from the VCC rail to ground or switch towards ground | |||
* Setting whether the H-bridge should be active at all (Output Enable) | |||
* Provide a state engine or other means for configuring the termination resistance to ground. | |||
== Driver circuit == | == Driver circuit == |
Revision as of 10:31, 30 November 2024
The LibreSilicon Pad Cell Generator is an extension of the Standard Logic Cell Library generator, which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.
A typical pad cell consists of driver logic, ESD protection and a bonding pad, which essentially just is a "large" metal square, big enough to fit a bonding ball needed to attach the bonding wire or solder it to a PCB (flip chip bonding) or onto another carrier substrate chip (chiplet assembly)
Driver Logic
This part of the pad cell is purely combinatorial, and controls based on its pins on the logic side where it's interfacing to the internal logic, what modes should be configured.
For instance, whether the output is enabled, in which case it would either drive current through its driver circuit or pull down to ground in case pull down mode is being set from the internal logic.
It can also be configured for high impedance input, in case OE is disabled.
Various additional functions can be implemented, like for instance impedance and termination resistor calibration in case it's part of a DRAM or PCIe PHY.
In short, the driver logic configures the actual physical properties of the pad depending on what the internal logic tells it to do:
- Set transistors to either drive from the VCC rail to ground or switch towards ground
- Setting whether the H-bridge should be active at all (Output Enable)
- Provide a state engine or other means for configuring the termination resistance to ground.
Driver circuit
lorem ipsum
ESD protection
lorem ipsum