User contributions for Leviathan

Results for Leviathan talk block log uploads logs abuse log

A user with 770 edits. Account created on 20 August 2021.

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00:0600:06, 12 August 2026 diff hist +45 LibreStandardCell →Building your own Docker container current Tag: Visual edit
00:0600:06, 12 August 2026 diff hist +396 LibrePDK No edit summary Tag: Visual edit
00:0300:03, 12 August 2026 diff hist +296 LibreStandardCell →Fetching the Docker image Tag: Visual edit
00:0000:00, 12 August 2026 diff hist +1 LibreStandardCell →Local installation Tag: Visual edit

20:0620:06, 11 August 2026 diff hist −675 LibrePDK →Ubuntu Tag: Visual edit
19:4319:43, 11 August 2026 diff hist +159 LibreStandardCell No edit summary
19:4219:42, 11 August 2026 diff hist +33 LibreStandardCell →Launch the Docker container Tag: Visual edit
19:4119:41, 11 August 2026 diff hist +755 LibreStandardCell →Local installation Tag: Visual edit
19:2919:29, 11 August 2026 diff hist +39 LibreStandardCell No edit summary Tag: Visual edit
19:2719:27, 11 August 2026 diff hist +112 LibrePDK →OpenVAF models Tag: Visual edit
19:2519:25, 11 August 2026 diff hist +1,847 LibrePDK →Boost Tag: Visual edit
19:1319:13, 11 August 2026 diff hist +184 LibrePDK →Installation Tag: Visual edit
19:1019:10, 11 August 2026 diff hist +667 LibrePDK →ngspice Tag: Visual edit
19:0519:05, 11 August 2026 diff hist +600 LibrePDK No edit summary Tag: Visual edit
18:5718:57, 11 August 2026 diff hist +211 Pad Frame Generator No edit summary Tag: Visual edit
14:2314:23, 11 August 2026 diff hist +960 Pad Frame Generator No edit summary Tag: Visual edit

22:4322:43, 10 August 2026 diff hist −2 High-Speed Impedance-Compensated Pad Cell →Predriver Slice Logic Specification Tag: Visual edit
22:4322:43, 10 August 2026 diff hist +506 High-Speed Impedance-Compensated Pad Cell →Predriver Slice Logic Specification
21:4821:48, 10 August 2026 diff hist +3 High-Speed Impedance-Compensated Pad Cell No edit summary Tag: Visual edit
21:4721:47, 10 August 2026 diff hist −2,726 High-Speed Impedance-Compensated Pad Cell →Segmented Driver Logic Tag: Visual edit
21:4521:45, 10 August 2026 diff hist +1,779 High-Speed Impedance-Compensated Pad Cell No edit summary
21:4121:41, 10 August 2026 diff hist −5,054 High-Speed Impedance-Compensated Pad Cell →Pre-Drive Slice Tag: Visual edit
21:3921:39, 10 August 2026 diff hist +23 N File:Predriver slice schematic.png No edit summary current
18:0618:06, 10 August 2026 diff hist +5,359 High-Speed Impedance-Compensated Pad Cell No edit summary Tag: Visual edit
18:0418:04, 10 August 2026 diff hist −9 High-Speed Impedance-Compensated Pad Cell →2.1 Multi-Leg / Segmented Output Driver Tag: Visual edit
18:0218:02, 10 August 2026 diff hist +408 Pad Frame Generator No edit summary Tag: Visual edit
12:4712:47, 10 August 2026 diff hist +1 Pad Cell Generator →Types of Pad Cells current Tag: Visual edit
12:3512:35, 10 August 2026 diff hist −532 Pad Cell Generator →How to use Tag: Visual edit
12:3512:35, 10 August 2026 diff hist +291 Pad Cell Generator No edit summary Tag: Visual edit
12:1512:15, 10 August 2026 diff hist +92 High-Speed Impedance-Compensated Pad Cell →3. Pre-Driver & Driver Netlist Topology (JSON) Tag: Visual edit
12:1412:14, 10 August 2026 diff hist +825 High-Speed Impedance-Compensated Pad Cell →5. Implementation Roadmap for LibreSilicon Team Tag: Visual edit
12:0512:05, 10 August 2026 diff hist +2 High-Speed Impedance-Compensated Pad Cell →High-Speed Impedance-Compensated Pad Cell Architecture & Specification Tag: Visual edit
12:0512:05, 10 August 2026 diff hist −52 High-Speed Impedance-Compensated Pad Cell →2. Core Architectural Pillars
12:0412:04, 10 August 2026 diff hist +44 High-Speed Impedance-Compensated Pad Cell →2. Core Architectural Pillars Tag: Visual edit
12:0412:04, 10 August 2026 diff hist +7 N File:Cell Corridor Macro.png No edit summary current
12:0012:00, 10 August 2026 diff hist +8,011 N High-Speed Impedance-Compensated Pad Cell Created page with "= High-Speed Impedance-Compensated Pad Cell Architecture & Specification = '''Document Status:''' Draft / Initial Specification '''Target Process:''' LibrePDK (IHP SG13G2 / Generic CMOS) '''Target Applications:''' High-Speed Interfaces (DDR4 SSTL/POD, PCIe Gen 1–3, High-Speed GPIO) == 1. Overview & Problem Statement == Standard single-stage push-pull digital I/O drivers (consisting of a single large PMOS and NMOS transistor pair) are strictly insufficient for high-spee..." Tag: Visual edit: Switched
11:5811:58, 10 August 2026 diff hist +47 Pad Cell Generator No edit summary Tag: Visual edit

17:5017:50, 8 August 2026 diff hist +335 LibreStandardCell No edit summary Tag: Visual edit
17:3417:34, 8 August 2026 diff hist +2,185 LibreStandardCell No edit summary Tag: Visual edit
17:3117:31, 8 August 2026 diff hist +10 N File:Screeny.png No edit summary current
17:1617:16, 8 August 2026 diff hist +50 LibreSilicon stack →Standard Cells Tag: Visual edit
17:1517:15, 8 August 2026 diff hist +51 LibreStandardCell No edit summary Tag: Visual edit
17:1417:14, 8 August 2026 diff hist +10 N File:LibreStandardCell screeny2.png No edit summary current
17:1317:13, 8 August 2026 diff hist +50 N LibreStandardCell Created page with "none|thumb" Tag: Visual edit
17:1317:13, 8 August 2026 diff hist +10 N File:LibreStandardCell screeny1.png No edit summary current
12:5912:59, 8 August 2026 diff hist +31 N File:LibreStandarcCell screeny1.png No edit summary current
12:4612:46, 8 August 2026 diff hist +179 LibreSilicon stack →Standard Cells Tag: Visual edit

12:5212:52, 18 July 2026 diff hist +19 High Contrast Resist v1 →2. Spin Coating current
12:4712:47, 18 July 2026 diff hist −4 High Contrast Resist v1 →2. Spin Coating
12:4512:45, 18 July 2026 diff hist −2 High Contrast Resist v1 →Leuco Crystal Violet (LCV) and Oxidation Pathways

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