Pad Cell Generator: Difference between revisions

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The LibreSilicon Pad Cell Generator is an extension of the [[StdCellLib|Standard Logic Cell Library generator]], which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.
The LibreSilicon Pad Cell Generator is an extension of the [[StdCellLib|Standard Logic Cell Library generator]], which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.


A typical pad cell consists of driver logic, ESD protection and a bonding pad, which essentially just is a "large" metal square, big enough to fit a bonding ball needed to attach the bonding wire or solder it to a PCB (flip chip bonding) or onto another carrier substrate chip (chiplet assembly)[[File:Padcell.png|thumb|Pad Cell in Magic editor]]
[[File:Padcell.png|none|thumb|302x302px|Pad Cell in Magic editor]]<blockquote>'''Note''': We are still waiting for the NLNet grant, so there isn't any code to speak of yet for this tool, but the general use of the tool will be pretty much the same as for generating the standard logic cell lib and the Danube River test structures for characterizing your target process.</blockquote>


== Driver Logic ==
== Existing Groundwork ==
This part of the pad cell is purely combinatorial, and controls based on its pins on the logic side where it's interfacing to the internal logic, what modes should be configured.
The generator is based on the work of several folks who started developing puzzle pieces for it before Google ran out of funding internally and the project had to go on hiatus


For instance, whether the output is enabled, in which case it would either drive current through its driver circuit or pull down to ground in case pull down mode is being set from the internal logic.
Here's some works our generator will be based on:


It can also be configured for high impedance input, in case OE is disabled.
* Gowthami Nalla did some work with the logic circuit and the driver but it's specific to XFAB only; https://github.com/gowthaminalla/bidirectional-buffer/
* Very rudimentary development has been done on the ESD front: https://github.com/AishikAnalogCKTdesign/ESD
* Philip's pad frame generator (Perl): https://www2.futureware.at/~philipp/vsd2018/
* Philip's very basic Perl based pad cell generator (https://pdk.libresilicon.com/PadCellGenerator.zip)
** Perl based
** Not portable
** Needs smarter ESD protection
** Needs smarter IO config
** Doesn't have termination resistor configuration (needed for DDR3/DDR4 PHYs)
** Not even yet half finished


Various additional functions can be implemented, like for instance impedance and termination resistor calibration in case it's part of a DRAM or PCIe PHY.
== Configuration ==
The Pad Cell Generator has the task of generating a [[Pad Cell]] for generating a pad frame for taping out a circuit with any given set of design rules for any given process.


In short, the driver logic configures the actual physical properties of the pad depending on what the internal logic tells it to do:
Just as with the Standard Cell Generator, you need to provide the Pad Cell Generator the appropriate configuration telling it about all the design constraints and mixed signal characteristics of the process you are targetting.


* Set transistors to either drive from the VCC rail to ground or switch towards ground
Please look at our reference technology folders like the design rule constraints and parameters, for which we introduced a somewhat standardized format with the advent of our [[Danube River]] test wafer generator.
* Setting whether the H-bridge should be active at all (Output Enable)
* Provide a state engine or other means for configuring the termination resistance to ground.


== Driver circuit ==
https://github.com/thesourcerer8/StdCellLib/tree/master/Tech.GF180MCU
Internally, transistors of a logic circuit only can drive a few micro amperes of current and are unable to survive driving a load like an LED.


In order to make a chip do something useful driver circuits need to be implemented which can provide the power needed for actually driving loads like making an LED blink or driving a small DC motor.
== How to use (WIP) ==
First clone the repository


This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.
git clone https://gitlab.libresilicon.com/leviathan/PadCellGenerator.git
cd PadCellGenerator


== ESD protection ==
Then you fetch the Dockerimage with all the LibreSilicon tools preinstalled, just as with DanubeRiver and the Standard Logic Cell generator library:
lorem ipsum


== Bonding pad ==
docker pull leviathanch/libresilicon-tools:latest
 
Then you've got to start the Docker container and build the pad cells for your specific process
 
xhost +local:docker
docker run -e DISPLAY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v `pwd`:/work -it leviathanch/libresilicon-tools
Or respectively just
./start_docker.sh
<blockquote>'''Notice''': This is work in progress. This Wiki page is about to change a lot and gain much more content soon... hopefully</blockquote>After that there's some make commands telling my Python scripts, which I haven't pushed yet, what to do, as soon as they can actually do it... when depends on NLNet.
 
For now it's just Perl scripts and some loose Magic files

Latest revision as of 19:43, 2 December 2024

The LibreSilicon Pad Cell Generator is an extension of the Standard Logic Cell Library generator, which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.

Pad Cell in Magic editor

Note: We are still waiting for the NLNet grant, so there isn't any code to speak of yet for this tool, but the general use of the tool will be pretty much the same as for generating the standard logic cell lib and the Danube River test structures for characterizing your target process.

Existing Groundwork

The generator is based on the work of several folks who started developing puzzle pieces for it before Google ran out of funding internally and the project had to go on hiatus

Here's some works our generator will be based on:

Configuration

The Pad Cell Generator has the task of generating a Pad Cell for generating a pad frame for taping out a circuit with any given set of design rules for any given process.

Just as with the Standard Cell Generator, you need to provide the Pad Cell Generator the appropriate configuration telling it about all the design constraints and mixed signal characteristics of the process you are targetting.

Please look at our reference technology folders like the design rule constraints and parameters, for which we introduced a somewhat standardized format with the advent of our Danube River test wafer generator.

https://github.com/thesourcerer8/StdCellLib/tree/master/Tech.GF180MCU

How to use (WIP)

First clone the repository 

git clone https://gitlab.libresilicon.com/leviathan/PadCellGenerator.git
cd PadCellGenerator

Then you fetch the Dockerimage with all the LibreSilicon tools preinstalled, just as with DanubeRiver and the Standard Logic Cell generator library: 

docker pull leviathanch/libresilicon-tools:latest

Then you've got to start the Docker container and build the pad cells for your specific process 

xhost +local:docker
docker run -e DISPLAY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v `pwd`:/work -it leviathanch/libresilicon-tools

Or respectively just 

./start_docker.sh

Notice: This is work in progress. This Wiki page is about to change a lot and gain much more content soon... hopefully

After that there's some make commands telling my Python scripts, which I haven't pushed yet, what to do, as soon as they can actually do it... when depends on NLNet.

For now it's just Perl scripts and some loose Magic files

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