Pad Cell Generator: Difference between revisions

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The LibreSilicon Pad Cell Generator is an extension of the [[StdCellLib|Standard Logic Cell Library generator]], which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.
[[File:30mA SG13G2@1V2 v2.png|thumb|'''Example 30mA SG13G2@1V2 (version 2)''']]
The LibreSilicon Pad Cell Generator is an extension of the [[LibrePDK]] which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.


The Pad Cell Generator has the task of generating a [[Pad Cell]] for generating a pad frame for taping out a circuit with any given set of design rules for any given process.
== Existing Groundwork ==
The generator is based on the work of several folks who started developing puzzle pieces for it before Google ran out of funding internally and the project had to go on hiatus


A typical pad cell consists of driver logic, ESD protection and a bonding pad, which essentially just is a "large" metal square, big enough to fit a bonding ball needed to attach the bonding wire or solder it to a PCB (flip chip bonding) or onto another carrier substrate chip (chiplet assembly)[[File:Padcell.png|Pad Cell in Magic editor|none|frame]]
Here's some works our generator will be based on:


== Driver Logic ==
* Gowthami Nalla did some work with the logic circuit and the driver but it's specific to XFAB only; https://github.com/gowthaminalla/bidirectional-buffer/
This part of the pad cell is purely combinatorial, and controls based on its pins on the logic side where it's interfacing to the internal logic, what modes should be configured.
* Very rudimentary development has been done on the ESD front: https://github.com/AishikAnalogCKTdesign/ESD
* Philip's pad frame generator (Perl): https://www2.futureware.at/~philipp/vsd2018/
* Philip's very basic Perl based pad cell generator (https://pdk.libresilicon.com/PadCellGenerator.zip)
** Perl based
** Not portable
** Needs smarter ESD protection
** Needs smarter IO config
** Doesn't have termination resistor configuration (needed for DDR3/DDR4 PHYs)
** Not even yet half finished


For instance, whether the output is enabled, in which case it would either drive current through its driver circuit or pull down to ground in case pull down mode is being set from the internal logic.
== Configuration ==
 
The Pad Cell Generator has the task of generating a [[Pad Cell]] for generating a pad frame for taping out a circuit with any given set of design rules for any given process.
It can also be configured for high impedance input, in case OE is disabled.
 
Various additional functions can be implemented, like for instance impedance and termination resistor calibration in case it's part of a DRAM or PCIe PHY.


In short, the driver logic configures the actual physical properties of the pad depending on what the internal logic tells it to do:
Just as with the Standard Cell Generator, you need to provide the Pad Cell Generator the appropriate configuration telling it about all the design constraints and mixed signal characteristics of the process you are targeting.


* Set transistors to either drive from the VCC rail to ground or switch towards ground
Please look at our reference technology folders like the design rule constraints and parameters, for which we introduced a somewhat standardized format with the advent of our [[Danube River]] test wafer generator.
* Setting whether the driver should be active at all (Output Enable)
* Provide a state engine or other means for configuring the termination resistance to ground.


== Driver circuit ==
== How to use ==
Internally, transistors of a logic circuit only can drive a few micro amperes of current and are unable to survive driving a load like an LED.
The Pad Cell Generator is part of [[LibrePDK]]


In order to make a chip do something useful driver circuits need to be implemented which can provide the power needed for actually driving loads like making an LED blink or driving a small DC motor.
Running the following script within the LibrePDK folder, after following the installation instructions...<syntaxhighlight lang="bash">
uv run librepdk_padframe_generator -i tests/padframes/padframe_sg13g2_1v2.json
</syntaxhighlight>You should end up with a set of pad cells dimensioned for 20mA, 30mA, 40mA and 60mA driver strength, plus a demo assembly which looks somewhat like this (still work in progress)
[[File:Pad Frame v2 Example SG13G2@1V2.png|none|thumb]]


This is being done in the driver circuit through [[Fingered Transistors]] which turn the low power logic states at its inputs into a state which is useful to the outside world.
== Electrical Discharge Protection ==
Since we're calculating backwards from the target values we wanna achieve based on values extracted from ngspice simulations using the SPICE models, it is no wonder that the final ngspice simulation turns out to check out fine for all the pad cells we generate.


== ESD protection ==
The whole math is being documented in [[Physics-Based Wire Sizing for I/O Pad Cells]]
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== Bonding pad ==
Subsequently the ngspice analysis and verification of the reverse solved hardware design can be found in [[ESD Verification]]

Latest revision as of 09:41, 29 May 2026

Example 30mA SG13G2@1V2 (version 2)

The LibreSilicon Pad Cell Generator is an extension of the LibrePDK which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.

Existing Groundwork

The generator is based on the work of several folks who started developing puzzle pieces for it before Google ran out of funding internally and the project had to go on hiatus

Here's some works our generator will be based on:

Configuration

The Pad Cell Generator has the task of generating a Pad Cell for generating a pad frame for taping out a circuit with any given set of design rules for any given process.

Just as with the Standard Cell Generator, you need to provide the Pad Cell Generator the appropriate configuration telling it about all the design constraints and mixed signal characteristics of the process you are targeting.

Please look at our reference technology folders like the design rule constraints and parameters, for which we introduced a somewhat standardized format with the advent of our Danube River test wafer generator.

How to use

The Pad Cell Generator is part of LibrePDK

Running the following script within the LibrePDK folder, after following the installation instructions...

uv run librepdk_padframe_generator -i tests/padframes/padframe_sg13g2_1v2.json

You should end up with a set of pad cells dimensioned for 20mA, 30mA, 40mA and 60mA driver strength, plus a demo assembly which looks somewhat like this (still work in progress)

Electrical Discharge Protection

Since we're calculating backwards from the target values we wanna achieve based on values extracted from ngspice simulations using the SPICE models, it is no wonder that the final ngspice simulation turns out to check out fine for all the pad cells we generate.

The whole math is being documented in Physics-Based Wire Sizing for I/O Pad Cells

Subsequently the ngspice analysis and verification of the reverse solved hardware design can be found in ESD Verification

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