Pad Cell Generator

The LibreSilicon Pad Cell Generator is an extension of the Standard Logic Cell Library generator, which besides the driver logic also dynamically generates the mixed signal parts needed for over current and static discharge protection and providing the currents needed for doing useful things with an actual physical chip, like driving an LED or a small motor.

Pad Cell in Magic editor

The Pad Cell Generator has the task of generating a Pad Cell for generating a pad frame for taping out a circuit with any given set of design rules for any given process.

Just as with the Standard Cell Generator, you need to provide the Pad Cell Generator the appropriate configuration telling it about all the design constraints and mixed signal characteristics of the process you are targetting.

Please look at our reference technology folders like the design rule constraints and parameters, for which we introduced a somewhat standardized format with the advent of our Danube River test wafer generator.

https://github.com/thesourcerer8/StdCellLib/tree/master/Tech.GF180MCU

Note: We are still waiting for the NLNet grant, so there isn't any code to speak of yet for this tool, but the general use of the tool will be pretty much the same as for generating the standard logic cell lib and the Danube River test structures for characterizing your target process.

First clone the repository

git clone https://gitlab.libresilicon.com/leviathan/PadCellGenerator.git
cd PadCellGenerator

Then you fetch the Dockerimage with all the LibreSilicon tools preinstalled, just as with DanubeRiver and the Standard Logic Cell generator library:

docker pull leviathanch/libresilicon-tools:latest