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Combined display of all available logs of LibreSilicon. You can narrow down the view by selecting a log type, the username (case-sensitive), or the affected page (also case-sensitive).
- 01:45, 26 May 2026 Leviathan talk contribs uploaded File:Hbm esd dissipation SG13G2@1.2V.png
- 01:42, 26 May 2026 Leviathan talk contribs created page File:Io cell 20mA@1.2V.png
- 01:42, 26 May 2026 Leviathan talk contribs uploaded File:Io cell 20mA@1.2V.png
- 01:13, 26 May 2026 Leviathan talk contribs created page File:Diode Example.png
- 01:13, 26 May 2026 Leviathan talk contribs uploaded File:Diode Example.png
- 01:10, 26 May 2026 Leviathan talk contribs created page File:Single Gate Example.png
- 01:10, 26 May 2026 Leviathan talk contribs uploaded File:Single Gate Example.png
- 01:07, 26 May 2026 Leviathan talk contribs created page File:Fingered Transistor.png
- 01:07, 26 May 2026 Leviathan talk contribs uploaded File:Fingered Transistor.png
- 01:01, 26 May 2026 Leviathan talk contribs created page Physics-Based Wire Sizing for I/O Pad Cells (Created page with " This document details the physical equations, parameters, and assumptions used by the LibrePDK layout generator to size wires in pad cells (such as the ESD rails and main power rails). ---- == 1. Transient ESD Wire Sizing (Human Body Model) == During an ESD event (e.g., a Human Body Model pulse), a high current passes through the ESD protection circuit in a very short duration (<math display="inline">t \approx 100\text{ ns}</math> to <math display="inline">150\text{ n...") Tag: Visual edit
- 00:34, 26 May 2026 Leviathan talk contribs created page File:Strip Resistor Example.png
- 00:34, 26 May 2026 Leviathan talk contribs uploaded File:Strip Resistor Example.png
- 00:23, 26 May 2026 Leviathan talk contribs created page File:LibrePDK Meander Example.png
- 00:23, 26 May 2026 Leviathan talk contribs uploaded File:LibrePDK Meander Example.png
- 00:19, 26 May 2026 Leviathan talk contribs created page File:50pF MiMCap (GF180A, 3.3V).png
- 00:19, 26 May 2026 Leviathan talk contribs uploaded File:50pF MiMCap (GF180A, 3.3V).png
- 22:55, 25 May 2026 Leviathan talk contribs created page File:Io cell 20mA.png
- 22:55, 25 May 2026 Leviathan talk contribs uploaded File:Io cell 20mA.png
- 21:53, 25 May 2026 Leviathan talk contribs created page File:Preliminary First Pad Frame generated.png
- 21:53, 25 May 2026 Leviathan talk contribs uploaded File:Preliminary First Pad Frame generated.png
- 16:20, 6 November 2025 Leviathan talk contribs created page File:LS1U flow.png
- 16:20, 6 November 2025 Leviathan talk contribs uploaded File:LS1U flow.png
- 16:05, 12 October 2025 Leviathan talk contribs created page Expert Assessment on Bulk Contact Geometry for Multi-Fingered MOSFET P-Cells in LibrePDK (Created page with " == I. Introduction and Fundamental Role of the Bulk Terminal == The design of robust parameterized cells (P-cells) for integrated circuit development, particularly for wide, multi-fingered Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), hinges critically on controlling parasitic elements. Multi-fingered transistors are a common architectural choice in modern very large scale integration (VLSI) design, used primarily to achieve high current driving capabili...") Tag: Visual edit
- 16:04, 12 October 2025 Leviathan talk contribs created page Analysis: Single Bulk Contact vs. Bulk Contact Ring for a FET (Created page with "This document analyzes the trade-offs between using a single, small bulk contact versus a continuous bulk contact ring (guard ring) around a Field-Effect Transistor (FET). The choice significantly impacts area, performance, and reliability. === Key Concepts === * '''Bulk (or Body):''' The underlying silicon substrate on which the transistor is built. It must be tied to a stable voltage potential (e.g., VSS for NMOS, VDD for PMOS). * '''Bulk Contact:''' The physical con...") Tag: Visual edit
- 14:48, 26 September 2025 Leviathan talk contribs created page File:My image 1.png (Automatically uploaded by PGFTikZ extension)
- 14:48, 26 September 2025 Leviathan talk contribs uploaded File:My image 1.png (Automatically uploaded by PGFTikZ extension)
- 13:21, 26 September 2025 Leviathan talk contribs created page LibreSilicon 1µm CMOS Process Flow (HKUST NFF) (Created page with "This document outlines the 1µm CMOS manufacturing process designed for the Hong Kong University of Science and Technology (HKUST) Nanoelectronics Fabrication Facility (NFF). It is a '''gate-first''' process utilizing polysilicon for the gate electrode and a shallow trench isolation (STI) approach for device isolation. The process is designed for manufacturing the LibreSilicon standard logic cells and is licensed under the Libre Silicon public license. == General Manuf...") Tag: Visual edit: Switched
- 19:12, 21 September 2025 Leviathan talk contribs created page File:Transmission gate.png
- 19:12, 21 September 2025 Leviathan talk contribs uploaded File:Transmission gate.png
- 20:19, 20 September 2025 Leviathan talk contribs created page File:Output Driver.png
- 20:19, 20 September 2025 Leviathan talk contribs uploaded File:Output Driver.png
- 19:51, 20 September 2025 Leviathan talk contribs created page File:Inverter.png
- 19:51, 20 September 2025 Leviathan talk contribs uploaded File:Inverter.png
- 19:30, 20 September 2025 Leviathan talk contribs created page File:NAND2 Gate.png
- 19:30, 20 September 2025 Leviathan talk contribs uploaded File:NAND2 Gate.png
- 16:59, 20 September 2025 Leviathan talk contribs created page File:Pad Cell Schematics.png
- 16:59, 20 September 2025 Leviathan talk contribs uploaded File:Pad Cell Schematics.png
- 13:41, 19 July 2025 Leviathan talk contribs created page LibrePDK (Created page with "The LibrePDK is the library driving Danube River and the Pad Cell Generator none|thumb|695x695px|ALibrePDK screen shot It is responsible for generating discrete parts with specific parameters for a specific process. The properties of the parts can be optimized by utilizing the calibration values extracted from the measurements of taped out Danube River test wafers. == Adding a new technology == Technologies currently supported can be found...") Tag: Visual edit
- 13:37, 19 July 2025 Leviathan talk contribs created page File:LibrePDK.png
- 13:37, 19 July 2025 Leviathan talk contribs uploaded File:LibrePDK.png
- 07:09, 14 July 2025 Leviathan talk contribs created page File:Closeup FETs.png
- 07:09, 14 July 2025 Leviathan talk contribs uploaded File:Closeup FETs.png
- 06:57, 14 July 2025 Leviathan talk contribs created page File:Transistor Structures.png
- 06:57, 14 July 2025 Leviathan talk contribs uploaded File:Transistor Structures.png
- 06:56, 14 July 2025 Leviathan talk contribs created page File:Large Meander Resistors.png
- 06:56, 14 July 2025 Leviathan talk contribs uploaded File:Large Meander Resistors.png
- 06:54, 14 July 2025 Leviathan talk contribs created page File:Small Meander Resistors.png
- 06:54, 14 July 2025 Leviathan talk contribs uploaded File:Small Meander Resistors.png
- 06:52, 14 July 2025 Leviathan talk contribs created page File:Strip resistors.png
- 06:52, 14 July 2025 Leviathan talk contribs uploaded File:Strip resistors.png
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