User contributions for Leviathan

26 May 2026

• 01:5601:56, 26 May 2026 diff hist +317 ESD Verification →The IHP SG13G2 @ 3.3V case Tag: Visual edit
• 01:4801:48, 26 May 2026 diff hist +1,709 N ESD Verification Created page with "Below two examples from our automated test suite showcasing how our approach reverse solving the HBM model math as elaborated in Physics-Based_Wire_Sizing_for_I/O_Pad_Cells actually leads to simulation results in ngspice which show that our ESD diodes we chose actually protect our internal circuitry. Oh wow. When you solve Ohm's law in one direction and then the other, you end up with the current you originally have defined at a certai..." Tag: Visual edit
• 01:4201:42, 26 May 2026 diff hist +33 N File:Io cell 20mA@1.2V.png No edit summary current
• 01:1401:14, 26 May 2026 diff hist +120 LibrePDK →Diodes Tag: Visual edit
• 01:1301:13, 26 May 2026 diff hist +47 N File:Diode Example.png No edit summary current
• 01:1201:12, 26 May 2026 diff hist −37 Pad Cell Generator No edit summary Tag: Visual edit
• 01:1001:10, 26 May 2026 diff hist +539 LibrePDK →Transistors Tag: Visual edit
• 01:1001:10, 26 May 2026 diff hist +38 N File:Single Gate Example.png No edit summary current
• 01:0701:07, 26 May 2026 diff hist +43 N File:Fingered Transistor.png No edit summary current
• 01:0401:04, 26 May 2026 diff hist +127 Pad Cell Generator →Electrical Discharge Protection Tag: Visual edit
• 01:0201:02, 26 May 2026 diff hist −1 Physics-Based Wire Sizing for I/O Pad Cells →Technology-Aware Thickness Model current Tag: Visual edit
• 01:0101:01, 26 May 2026 diff hist +4,768 N Physics-Based Wire Sizing for I/O Pad Cells Created page with " This document details the physical equations, parameters, and assumptions used by the LibrePDK layout generator to size wires in pad cells (such as the ESD rails and main power rails). ---- == 1. Transient ESD Wire Sizing (Human Body Model) == During an ESD event (e.g., a Human Body Model pulse), a high current passes through the ESD protection circuit in a very short duration (<math display="inline">t \approx 100\text{ ns}</math> to <math display="inline">150\text{ n..." Tag: Visual edit
• 00:5500:55, 26 May 2026 diff hist +388 Pad Cell Generator No edit summary Tag: Visual edit
• 00:4400:44, 26 May 2026 diff hist +113 LibrePDK No edit summary Tag: Visual edit
• 00:4200:42, 26 May 2026 diff hist −8 LibrePDK →Resistors Tag: Visual edit
• 00:4100:41, 26 May 2026 diff hist −6 LibrePDK No edit summary Tag: Visual edit
• 00:4100:41, 26 May 2026 diff hist +8 LibrePDK →Components Tag: Visual edit
• 00:4000:40, 26 May 2026 diff hist +516 LibrePDK →Resistors Tag: Visual edit
• 00:3600:36, 26 May 2026 diff hist +197 LibrePDK →Resistors Tag: Visual edit
• 00:3400:34, 26 May 2026 diff hist +43 N File:Strip Resistor Example.png No edit summary current
• 00:2500:25, 26 May 2026 diff hist +517 LibrePDK →Components Tag: Visual edit
• 00:2300:23, 26 May 2026 diff hist +20 N File:LibrePDK Meander Example.png No edit summary current
• 00:1900:19, 26 May 2026 diff hist +65 N File:50pF MiMCap (GF180A, 3.3V).png No edit summary current
• 00:1700:17, 26 May 2026 diff hist +474 LibrePDK →Installation Tag: Visual edit
• 00:0300:03, 26 May 2026 diff hist +2,072 LibrePDK No edit summary

25 May 2026

• 23:5923:59, 25 May 2026 diff hist +346 Pad Cell Generator →How to use Tag: Visual edit
• 23:5523:55, 25 May 2026 diff hist +181 LibrePDK →Adding a new technology Tag: Visual edit
• 23:5123:51, 25 May 2026 diff hist +4 Pad Cell Generator →How to use Tag: Visual edit
• 23:5123:51, 25 May 2026 diff hist −821 Pad Cell Generator →How to use (WIP) Tag: Visual edit
• 22:5622:56, 25 May 2026 diff hist −20 Pad Cell No edit summary current Tag: Visual edit
• 22:5522:55, 25 May 2026 diff hist +61 N File:Io cell 20mA.png No edit summary current
• 22:0622:06, 25 May 2026 diff hist +79 Pad Cell Generator No edit summary Tag: Visual edit
• 22:0022:00, 25 May 2026 diff hist −4 Pad Cell Generator No edit summary Tag: Visual edit
• 21:5821:58, 25 May 2026 diff hist +957 LibreSilicon stack →Pad Cells Tag: Visual edit
• 21:5321:53, 25 May 2026 diff hist +83 N File:Preliminary First Pad Frame generated.png No edit summary current
• 21:5221:52, 25 May 2026 diff hist +502 Software tools No edit summary current Tag: Visual edit
• 21:4721:47, 25 May 2026 diff hist −292 Pad Cell Generator No edit summary Tag: Visual edit

24 November 2025

• 02:5002:50, 24 November 2025 diff hist +206 Danube River →Successful tapeouts current Tag: Visual edit

6 November 2025

• 16:2116:21, 6 November 2025 diff hist +32 LibreSilicon 1µm CMOS Process Flow (HKUST NFF) Integrated TikZ renderer is broken in newest MediaWiki current Tag: Visual edit
• 16:2016:20, 6 November 2025 diff hist +17 N File:LS1U flow.png No edit summary current
• 16:1316:13, 6 November 2025 diff hist −3,484 LibreSilicon 1µm CMOS Process Flow (HKUST NFF) No edit summary

12 October 2025

• 16:0716:07, 12 October 2025 diff hist −24 Main Page No edit summary current Tag: Visual edit
• 16:0716:07, 12 October 2025 diff hist +24 Main Page No edit summary Tag: Visual edit
• 16:0516:05, 12 October 2025 diff hist +24,015 N Expert Assessment on Bulk Contact Geometry for Multi-Fingered MOSFET P-Cells in LibrePDK Created page with " == I. Introduction and Fundamental Role of the Bulk Terminal == The design of robust parameterized cells (P-cells) for integrated circuit development, particularly for wide, multi-fingered Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), hinges critically on controlling parasitic elements. Multi-fingered transistors are a common architectural choice in modern very large scale integration (VLSI) design, used primarily to achieve high current driving capabili..." current Tag: Visual edit
• 16:0516:05, 12 October 2025 diff hist +4 Fingered Transistors No edit summary current Tag: Visual edit
• 16:0416:04, 12 October 2025 diff hist +99 Fingered Transistors No edit summary Tag: Visual edit
• 16:0416:04, 12 October 2025 diff hist +5,577 N Analysis: Single Bulk Contact vs. Bulk Contact Ring for a FET Created page with "This document analyzes the trade-offs between using a single, small bulk contact versus a continuous bulk contact ring (guard ring) around a Field-Effect Transistor (FET). The choice significantly impacts area, performance, and reliability. === Key Concepts === * '''Bulk (or Body):''' The underlying silicon substrate on which the transistor is built. It must be tied to a stable voltage potential (e.g., VSS for NMOS, VDD for PMOS). * '''Bulk Contact:''' The physical con..." current Tag: Visual edit
• 16:0316:03, 12 October 2025 diff hist +243 Fingered Transistors No edit summary Tag: Visual edit
• 16:0016:00, 12 October 2025 diff hist +45 Pad Cell →Transmission gate Tag: Visual edit
• 15:5815:58, 12 October 2025 diff hist +34 Main Page No edit summary Tag: Visual edit